1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically, to a method of manufacturing a select transistor in a NAND flash memory.
2. Discussion of Related Art
Generally, in a NAND flash memory device, select transistors disposed at both ends of a string select the string upon program, erase and read operation.
A leakage current may be occurred at unselected string of unselected blocks during a read operation of a selected block, thereby causing read error to occur. Hence, it is necessary to control the leakage current of the select transistor.
The leakage current must be maintained at lower than 5 pA at room temperature and Vd=1V. To this, a threshold voltage implant is performed in a cell region as well as a select transistor region, and the threshold voltage implant is performed by only opening the select transistor region, once more. That is, twice threshold voltage implant are performed at the select transistor region. An area opened by the threshold implantation mask for the select transistor becomes small since the select transistor region is only opened. Accordingly, an implant ion is not implanted to a portion of a channel region for the select transistor due to a shadowing effect and the channel region of the select transistor is not uniform. Accordingly, there is a problem in terms of securing the characteristic of the select transistor.
Therefore, in a method of manufacturing a NAND flash memory device, there is a need for methods in which the leakage current of the select transistor can be controlled.